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1 ? fn6320.3 isl8840a, isl8841a, isl8842a, isl8843a, isl8844a, isl8845a high performance industry standard single-ended current mode pwm controller the isl884xa is a high perfor mance drop-in replacement for the popular 28c4x and 18c4x pwm controllers suitable for a wide range of power conversion applications including boost, flyback, and isolated output configurations. its fast signal propagation and outpu t switching characteristics make this an ideal product for existing and new designs. features include 30v operatio n, low operating current, 90 a start-up current, adjustable operating frequency to 2mhz, and high peak current drive capability with 20ns rise and fall times. pinout isl8840a, isl8841a, isl8842a, isl8843a, isl8844a, isl8845a (8 ld soic, msop) top view features ? 1a mosfet gate driver ?90 a start-up current, 125 a maximum ? 35ns propagation delay current sense to output ? fast transient response wit h peak current mode control ? 30v operation ? adjustable switching frequency to 2mhz ? 20ns rise and fall times with 1nf output load ? trimmed timing capacitor disc harge current for accurate deadtime/maximum duty cycle control ? 1.5mhz bandwidth error amplifier ? tight tolerance voltage reference over line, load and temperature ? 3% current limit threshold ? pb-free plus anneal available and elv, weee, rohs compliant applications ? telecom and datacom power ? wireless base station power ? file server power ? industrial power systems ? pc power supplies ? isolated buck and flyback regulators ? boost regulators part number rising uvlo max. duty cycle isl8840a 7.0 100% isl8841a 7.0 50% isl8842a 14.4v 100% isl8843a 8.4v 100% isl8844a 14.4v 50% isl8845a 8.4v 50% comp fb rtct vref vdd out gnd 1 2 3 4 8 cs 7 6 5 data sheet april 18, 2007 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright ? intersil americas inc. 2005, 2006, 2007. all rights reserved. all other trademarks mentioned are the property of their respective owners.
2 fn6320.3 april 18, 2007 ordering information part number* part marking temp. range (c) package (pb-free) pkg. dwg. # ISL8840AABZ (see note) 8840 aabz -40 to +105 8 ld soic m8.15 isl8840aauz (see note) 40aaz -40 to +105 8 ld msop m8.118 isl8840ambz (see note) 8840 ambz -55 to +125 8 ld soic m8.15 isl8840amuz (see note) 40amz -55 to +125 8 ld msop m8.118 isl8841aabz (see note) 8841 aabz -40 to +105 8 ld soic m8.15 isl8841aauz (see note) 41aaz -40 to +105 8 ld msop m8.118 isl8841ambz (see note) 8841 ambz -55 to +125 8 ld soic m8.15 isl8841amuz (see note) 41amz -55 to +125 8 ld msop m8.118 isl8842aabz (see note) 8842 aabz -40 to +105 8 ld soic m8.15 isl8842aauz (see note) 42aaz -40 to +105 8 ld msop m8.118 isl8842ambz (see note) 8842 ambz -55 to +125 8 ld soic m8.15 isl8842amuz (see note) 42amz -55 to +125 8 ld msop m8.118 isl8843aabz (see note) 8843 aabz -40 to +105 8 ld soic m8.15 isl8843aauz (see note) 43aaz -40 to +105 8 ld msop m8.118 isl8843ambz (see note) 8843 ambz -55 to +125 8 ld soic m8.15 isl8843amuz (see note) 43amz -55 to +125 8 ld msop m8.118 isl8844aabz (see note) 8844 aabz -40 to +105 8 ld soic m8.15 isl8844aauz (see note) 44aaz -40 to +105 8 ld msop m8.118 isl8844ambz (see note) 8844 ambz -55 to +125 8 ld soic m8.15 isl8844amuz (see note) 44amz -55 to +125 8 ld msop m8.118 isl8845aabz (see note) 8845 aabz -40 to +105 8 ld soic m8.15 isl8845aauz (see note) 45aaz -40 to +105 8 ld msop m8.118 isl8845ambz (see note) 8845 ambz -55 to +125 8 ld soic m8.15 isl8845amuz (see note) 45amz -55 to +125 8 ld msop m8.118 *add ?-t? suffix for tape and reel. note: intersil pb-free plus anneal pr oducts employ special pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. ordering information (continued) part number* part marking temp. range (c) package (pb-free) pkg. dwg. # isl8840a, isl8841a, isl8842a , isl8843a, isl8844a, isl8845a
3 fn6320.3 april 18, 2007 functional block diagram t q q on 150k 100k v dd cs out fb rtct gnd vref pwm comparator reset dominant 2.5v enable 8.4ma 2.9v 1.0v oscillator comparator <10ns + - start/stop uv comparator v ref 5.00v + - + - 100mv error amplifier + - vref + - on + - s r q q comp vref uv comparator 4.65v 4.80v + - a = 0.5 + - clock 1.1v clamp 2r r vf total = 1.15v a vref fault ok v dd 36k isl8841a/ only isl8844a/ isl8845a isl8840a, isl8841a, isl8842a, isl8843a, isl8844a, isl8845a
4 fn6320.3 april 18, 2007 typical application - 48v input dual output flyback v in + v in - return t1 q3 36v to 75v vr1 +1.8v +3.3v c1 c2 c3 r1 r3 c4 q1 r4 cr6 c5 r22 u2 cr2 cr5 cr4 c17 r21 u3 r16 c14 c13 r15 r19 r17 r18 r20 c15 c16 c12 c11 r13 c8 r10 r6 cr1 + + c21 c19 c22 c20 + + c6 isl884xa v dd rtct cs fb out comp vref gnd r26 r27 u4 isl8840a, isl8841a, isl8842a, isl8843a, isl8844a, isl8845a
5 fn6320.3 april 18, 2007 typical application - boost converter vin+ vin- c1 q1 r1 r4 cr1 c9 r7 c2 c5 c6 c7 r3 + r2 c4 l1 c3 vin+ u1 isl884xa out cs rtct fb comp vref vdd gnd +vout r6 r5 return c10 c8 r8 isl8840a, isl8841a, isl8842a, isl8843a, isl8844a, isl8845a
6 fn6320.3 april 18, 2007 absolute maximum rati ngs thermal information supply voltage, v dd . . . . . . . . . . . . . . . . . . . . . gnd -0.3v to +30v out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . gnd -0.3v to v dd + 0.3v signal pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . gnd -0.3v to 6.0v peak gate current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1a esd classification human body model (per jesd22-a114c.01) . . . . . . . . . . .2000v machine model (per eia/jesd22-a115-a) . . . . . . . . . . . . . .200v charged device model (per jesd22-c191-a) . . . . . . . . . .1000v operating conditions temperature range isl884xaaxz . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40c to +105c isl884xamxz. . . . . . . . . . . . . . . . . . . . . . . . . . . .-55c to +125c supply voltage range (typical, note 2) isl884xa . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9v to 30v thermal resistance (typical, note 1) ja (c/w) soic package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 msop package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 maximum junction temperature . . . . . . . . . . . . . . .-55c to +150c maximum storage temperature range . . . . . . . . . .-65c to +150c maximum lead temperature (soldering 10s) . . . . . . . . . . . . +300c (soic, msop - lead tips only) caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. +150c max junction temperature is intended for short periods of time to prevent shortening the lifetime. constantly operated a t +150c may shorten the life of the part. notes: 1. ja is measured with the component mounted on a high effective therma l conductivity test board in fr ee air. see technical brief tb 379 for details. 2. all voltages are with respect to gnd. electrical specifi cations isl884xaa - recommended operating conditions unless otherwise noted. refer to block diagram and typical application schematic onpage 3 and page 4. v dd = 15v, r t = 10k , c t = 3.3nf, t a = -40 to +105c (note 3). typical values are at t a = +25c parameter test conditions min typ max units undervoltage lockout start threshold (isl8840a, isl8841a) 6.5 7.0 7.5 v start threshold (isl8843a, isl8845a) 8.0 8.4 9.0 v start threshold (isl8842a, isl8844a) (note 6) 13.3 14.3 15.3 v stop threshold (isl8840a, isl8841a) 6.1 6.6 6.9 v stop threshold (isl8843a, isl8845a) 7.3 7.6 8.0 v stop threshold (isl8842a, isl8844a) 8.0 8.8 9.6 v hysteresis (isl8840a, isl8841a) - 0.4 - v hysteresis (isl8843a, isl8845a) - 0.8 - v hysteresis (isl8842a, isl8844a) - 5.4 - v startup current, i dd v dd < start threshold - 90 125 a operating current, i dd (note 4) - 2.9 4.0 ma operating supply current, i d includes 1nf gate loading - 4.75 5.5 ma reference voltage overall accuracy over line (v dd = 12v to 30v), load, temperature 4.925 5.000 5.050 v long term stability t a = +125c, 1000 hours (note 5) - 5 - mv current limit, sourcing -20 - - ma current limit, sinking 5- -ma current sense input bias current v cs = 1v -1.0 - 1.0 a cs offset voltage v cs = 0v (note 5) 95 100 105 mv comp to pwm comparator offset voltage v cs = 0v (note 5) 0.80 1.15 1.30 v isl8840a, isl8841a, isl8842a , isl8843a, isl8844a, isl8845a
7 fn6320.3 april 18, 2007 input signal, maximum 0.97 1.00 1.03 v gain, a cs = v comp / v cs 0 < v cs < 910mv, v fb = 0v 2.5 3.0 3.5 v/v cs to out delay -3555ns error amplifier open loop voltage gain (note 5) 60 90 - db unity gain bandwidth (note 5) 1.0 1.5 - mhz reference voltage v fb = v comp 2.475 2.500 2.530 v fb input bias current v fb = 0v -1.0 -0.2 1.0 a comp sink current v comp = 1.5v, v fb = 2.7v 1.0 - - ma comp source current v comp = 1.5v, v fb = 2.3v -0.4 - - ma comp voh v fb = 2.3v 4.80 - vref v comp vol v fb = 2.7v 0.4 - 1.0 v psrr frequency = 120hz, v dd = 12v to 30v (note 5) 60 80 - db oscillator frequency accuracy initial, t a = +25c 48 51 53 khz frequency variation with v dd t a = +25c, (f 30v - f 10v )/f 30v -0.21.0% temperature stability (note 5) - - 5 % amplitude, peak to peak static test - 1.75 - v rtct discharge voltage (valley voltage) static test - 1.0 - v discharge current rtct = 2.0v 6.5 7.8 8.5 ma output gate voh v dd to out, i out = -200ma - 1.0 2.0 v gate vol out to gnd, i out = 200ma - 1.0 2.0 v peak output current c out = 1nf (note 5) - 1.0 - a rise time c out = 1nf (note 5) - 20 40 ns fall time c out = 1nf (note 5) - 20 40 ns gate vol uvlo clamp voltage vdd = 5v, i load = 1ma - - 1.2 v pwm maximum duty cycle (isl8840a, isl8842a, isl8843a) comp = vref 94.0 96.0 - % maximum duty cycle (isl8841a, isl8844a, isl8845a) comp = vref 47.0 48.0 - % minimum duty cycle comp = gnd - - 0 % notes: 3. specifications at -40c and +105c are guar anteed by +25c test with margin limits. 4. this is the v dd current consumed when the device is active but not switching. does not include gate drive current. 5. these parameters, although guaranteed, are not 100% tested in production. 6. adjust v dd above the start threshold and then lower to 15v. electrical specifications isl884xaa - recommended operating conditions unless otherwi se noted. refer to block diagram and typical application schematic onpage 3 and page 4. v dd = 15v, r t = 10k , c t = 3.3nf, t a = -40 to +105c (note 3). typical values are at t a = +25c (continued) parameter test conditions min typ max units isl8840a, isl8841a, isl8842a , isl8843a, isl8844a, isl8845a
8 fn6320.3 april 18, 2007 electrical specifications isl884xam - recommended operating conditions unless other wise noted. refer to block diagram and typical applicati on schematic. v dd = 15v, rt = 10k , ct = 3.3nf, t a = -55 to +125c (note 7), typical values are at t a = +25c parameter test conditions min typ max units undervoltage lockout start threshold (isl8840a, isl8841a) 6.5 7.0 7.5 v start threshold (isl8843a, isl8845a) 8.0 8.4 9.0 v start threshold (isl8842a, isl8844a) (note 10) 13.3 14.3 15.3 v stop threshold (isl8840a, isl8841a) 6.1 6.6 6.9 v stop threshold (isl8843a, isl8845a) 7.3 7.6 8.0 v stop threshold (isl8842a, isl8844a) 8.0 8.8 9.6 v hysteresis (isl8840a, isl8841a) - 0.4 - v hysteresis (isl8843a, isl8845a) - 0.8 - v hysteresis (isl8842a, isl8844a) - 5.4 - v startup current, i dd v dd < start threshold - 90 125 a operating current, i dd (note 8) - 2.9 4.0 ma operating supply current, i d includes 1nf gate loading - 4.75 5.5 ma reference voltage overall accuracy over line (v dd = 12v to 30v), load, temperature 4.900 5.000 5.050 v long term stability t a = +125c, 1000 hours (note 9) - 5 - mv current limit, sourcing -20 - - ma current limit, sinking 5- -ma current sense input bias current v cs = 1v -1.0 - 1.0 a cs offset voltage v cs = 0v (note 9) 95 100 105 mv comp to pwm comparator offset voltage v cs = 0v (note 9) 0.80 1.15 1.30 v input signal, maximum 0.97 1.00 1.03 v gain, a cs = v comp / v cs 0 < v cs < 910mv, v fb = 0v 2.5 3.0 3.5 v/v cs to out delay -3560ns error amplifier open loop voltage gain (note 9) 60 90 - db unity gain bandwidth (note 9) 1.0 1.5 - mhz reference voltage v fb = v comp 2.460 2.500 2.535 v fb input bias current v fb = 0v -1.0 -0.2 1.0 a comp sink current v comp = 1.5v, v fb = 2.7v 1.0 - - ma comp source current v comp = 1.5v, v fb = 2.3v -0.4 - - ma comp voh v fb = 2.3v 4.80 - vref v comp vol v fb = 2.7v 0.4 - 1.0 v psrr frequency = 120hz, v dd = 12v to 30v (note 9) 60 80 - db oscillator frequency accuracy initial, t a = +25c 485153khz frequency variation with v dd t a = +25c, (f 30v - f 10v )/f 30v -0.21.0% temperature stability (note 9) - - 5 % isl8840a, isl8841a, isl8842a , isl8843a, isl8844a, isl8845a
9 fn6320.3 april 18, 2007 amplitude, peak to peak static test - 1.75 - v rtct discharge voltage (valley voltage) static test - 1.0 - v discharge current rtct = 2.0v 6.2 8.0 8.5 ma output gate voh v dd - out, i out = -200ma - 1.0 2.0 v gate vol out - gnd, i out = 200ma - 1.0 2.0 v peak output current c out = 1nf (note 9) - 1.0 - a rise time c out = 1nf (note 9) - 20 40 ns fall time c out = 1nf (note 9) - 20 40 ns gate vol uvlo clamp voltage v dd = 5v, i load = 1ma - - 1.2 v pwm maximum duty cycle (isl8840a, isl8842a, isl8843a) comp = vref 94.0 96.0 - % maximum duty cycle (isl8841a, isl8844a, isl8845a) comp = vref 47.0 48.0 - % minimum duty cycle comp = gnd - - 0 % notes: 7. specifications at -55c and + 125c are guaranteed by +25c test with margin limits. 8. this is the v dd current consumed when the device is active but not switching. does not include gate drive current. 9. these parameters, although guaranteed, are not 100% tested in production. 10. adjust v dd above the start threshold and then lower to 15v. electrical specifications isl884xam - recommended operating conditions unless other wise noted. refer to block diagram and typical applicati on schematic. v dd = 15v, rt = 10k , ct = 3.3nf, t a = -55 to +125c (note 7), typical values are at t a = +25c (continued) parameter test conditions min typ max units typical performance curves figure 1. frequency vs temperature fig ure 2. reference voltage vs temperature -60 -40 -20 0 20 40 60 80 100 120 140 0.98 0.99 1.00 1.01 temperature (c) normalized frequency -60 -40 -20 0 20 40 60 80 100 0.995 0.996 0.997 0.998 0.999 1.000 1.001 temperature (c) normalized vref 140 120 isl8840a, isl8841a, isl8842a , isl8843a, isl8844a, isl8845a
10 fn6320.3 april 18, 2007 pin descriptions rtct - this is the oscillator timing control pin. the operational frequency and maximum duty cycle are set by connecting a resistor, rt, between vref and this pin and a timing capacitor, ct, from this pin to gnd. the oscillator produces a sawtooth waveform with a programmable frequency range up to 2.0mhz. the charge time, t c , the discharge time, t d , the switching frequency, f, and the maximum duty cycle, dmax, can be approximated from the following equations: the formulae have increased error at higher frequencies due to propagation delays. figure 4 may be used as a guideline in selecting the capacitor and resistor values required for a given frequency. comp - comp is the output of the error amplifier and the input of the pwm comparator. the control loop frequency compensation network is con nected between the comp and fb pins. fb - the output voltage feedback is connected to the inverting input of the error am plifier through this pin. the non-inverting input of the error amplifier is internally tied to a reference voltage. cs - this is the current sense input to the pwm comparator. the range of the input signal is nominally 0v to 1.0v and has an internal offset of 100mv. gnd - gnd is the power and small signal reference ground for all functions. out - this is the drive output to the power switching device. it is a high current output capable of driving the gate of a power mosfet with peak currents of 1.0a . this gate output is actively held low when v dd is below the uvlo threshold. v dd - v dd is the power connection for the device. the total supply current will depend on the load applied to out. total i dd current is the sum of th e operating current and the average output current. knowing the operating frequency, f, and the mosfet gate charge, qg, the average output current can be calculated from: to optimize noise immunity, bypass v dd to gnd with a ceramic capacitor as close to the v dd and gnd pins as possible. vref - the 5.00v reference voltage output. +1.0/-1.5% tolerance over line, load and operating temperature. bypass to gnd with a 0.1 f to 3.3 f capacitor to filter this output as needed. functional description features the isl884xa current mode pwm makes an ideal choice for low-cost flyback and forward topology applications. with its greatly improved performance ov er industry standard parts, it is the obvious choice for new designs or existing designs which require updating. oscillator the isl884xa has a sawt ooth oscillator with a programmable frequency range to 2mhz, which can be programmed with a resistor from vref and a capacitor to gnd on the rtct pin. (please refer to figure 4 for the resistor and capacitance required for a given frequency.) figure 3. ea reference vs temperature figure 4. resistance for ct capacitor values given typical performance curves (continued) -60 -40 -20 0 20 40 60 80 100 120 140 0.996 0.997 0.998 1.000 1.001 temperature (c) normalized ea reference 1 10 100 1 10 100 10 3 rt (k ) frequency (hz) 100pf 220pf 330pf 470pf 1.0nf 2.2nf 3.3nf 4.7nf 6.8nf t c 0.533 rt ct ?? (eq. 1) t d rt ? ct in 0.008 rt 3.83 ? ? 0.008 rt 1.71 ? ? --------------------------------------------- ? ? ? ? ?? (eq. 2) f 1t c t d + () ? = (eq. 3) dt c f ? = (eq. 4) i out qg f = (eq. 5) isl8840a, isl8841a, isl8842a , isl8843a, isl8844a, isl8845a
11 fn6320.3 april 18, 2007 soft-start operation soft-start must be implemented externally. one method, illustrated below, clamps the voltage on comp. the comp pin is clamped to the voltage on capacitor c1 plus a base-emitter junction by transistor q1. c1 is charged from vref through resistor r1 and the base current of q1. at power-up c1 is fully discharged, comp is at ~0.7v, and the duty cycle is zero. as c1 charges, the voltage on comp increases, and the duty cycle in creases in proportion to the voltage on c1. when comp reaches the steady state operating point, the control loop takes over and soft start is complete. c1 continues to charge up to vref and no longer affects comp. during power down, diode d1 quickly discharges c1 so that the soft start circuit is properly initialized prior to the next power on sequence. gate drive the isl884xa is capable of sourcing and sinking 1a peak current. to limit the peak current through the ic, an optional external resistor may be placed between the totem-pole output of the ic (out pin) and the gate of the mosfet. this small series resistor also da mps any oscillations caused by the resonant tank of the parasiti c inductances in the traces of the board and the fet?s input capacitance. slope compensation for applications where the maximum duty cycle is less than 50%, slope compensation may be used to improve noise immunity, particularly at lighter loads. the amount of slope compensation required for noise immunity is determined empirically, but is generally about 10% of the full scale current feedback signal. for applications where the duty cycle is greater than 50%, slope compensation is required to prevent instability. slope compensation may be accomplished by summing an external ramp with the current feedback signal or by subtracting the external ramp from the voltage feedback error signal. adding the external ramp to the current feedback signal is the more popular method. from the small signal current-mode model [1] it can be shown that the naturally-sampled modulator gain, fm, without slope compensati on, is in equation 6. where sn is the slope of the sa wtooth signal and tsw is the duration of the half-cycle. when an external ramp is added, the modulator gain becomes: where se is slope of the external ramp and the criteria for determining the correct amount of external ramp can be determined by appropriately setting the damping factor of the double-po le located at the switching frequency. the double-pole will be critically damped if the q-factor is set to 1, over-damped for q < 1, and under-damped for q > 1. an under-damped condition may result in current loop instability. where d is the percent of on time during a switching cycle. setting q = 1 and solving for se yields since sn and se are the on time slopes of the current ramp and the external ramp, respecti vely, they can be multiplied by t on to obtain the voltage change that occurs during t on . where vn is the change in the current feedback signal ( i) during the on time and ve is the voltage that must be added by the external ramp. for a flyback converter, vn can be solved for in terms of input voltage, current transducer components, and primary inductance, yielding where r cs is the current sense resistor, f sw is the switching frequency, l p is the primary inductance, v in is the minimum input voltage, and d is the maximum duty cycle. figure 5. soft-start vref comp gnd isl884xa c1 q1 d1 r1 fm 1 sntsw ------------------- - = (eq. 6) fm 1 sn se + () tsw -------------------------------------- - 1 m c sntsw ---------------------------- == (eq. 7) m c 1 se sn ------- + = (eq. 8) q 1 m c 1d ? () 0.5 ? () ------------------------------------------------- = (eq. 9) s e s n 1 -- - 0.5 + ?? ?? 1 1d ? ------------- 1 ? ?? ?? = (eq. 10) v e v n 1 -- - 0.5 + ?? ?? 1 1d ? ------------- 1 ? ?? ?? = (eq. 11) v e dt ? sw v in r cs ?? l p ---------------------------------------------------- 1 -- - 0.5 + ?? ?? 1 1d ? ------------- 1 ? ?? ?? = v (eq. 12) isl8840a, isl8841a, isl8842a , isl8843a, isl8844a, isl8845a
12 fn6320.3 april 18, 2007 the current sense signal at the end of the on time for ccm operation is: where v cs is the voltage across the current sense resistor, l s is the secondary winding inductance, and i o is the output current at current limit. equation 13 assumes the voltage drop across the output re ctifier is negligible. since the peak current limit threshold is 1.00v, the total current feedback signal plus the external ramp voltage must sum to this value when the output load is at the current limit threshold. substituting equations 12 and 13 into equation 14 and solving for r cs yields adding slope compensation is accomplished in the isl884xa using an external buffer transistor and the rtct signal. a typical application sums the buffered rtct signal with the current sense feedback and applies the result to the cs pin as shown in figure 6. assuming the designer has selected values for the rc filter (r 6 and c 4 ) placed on the cs pin, the value of r 9 required to add the appropriate external ramp can be found by superposition. the factor of 2.05 in equati on 16 arises from the peak amplitude of the sawtooth waveform on rtct minus a base-emitter junction drop. that voltage multiplied by the maximum duty cycle is the volt age source fo r the slope compensation. rearranging to solve for r 9 yields: the value of r cs determined in equation 15 must be rescaled so that the current s ense signal presented at the cs pin is that predicted by equation 13. the divider created by r 6 and r 9 makes this necessary. v cs n s r cs ? n p ------------------------ i o 1d ? () v o f ?? sw 2l s -------------------------------------------- + ?? ?? ?? = v (eq. 13) v e v cs + 1 = (eq. 14) r cs 1 df sw v in ?? l p ------------------------------- 1 -- - 0.5 + 1d ? ----------------- - 1 ? ?? ?? ?? ?? ? n s n p ------ - i o 1d ? () v o f sw ?? 2l s -------------------------------------------- + ?? ?? ?? ? + ------------------------------------------------------------------------------------------------------------------------------- --------------------- - = (eq. 15) cs rtct r6 c4 r9 isl8843 vref figure 6. slope compensation v e 2.05d r 6 ? r 6 r 9 + --------------------------- - = v (eq. 16) r 9 2.05d v e ? () r 6 ? v e --------------------------------------------- - = (eq. 17) r cs r 6 r 9 + r 9 -------------------- - r cs ? = (eq. 18) isl8840a, isl8841a, isl8842a , isl8843a, isl8844a, isl8845a
13 fn6320.3 april 18, 2007 example: v in = 12v v o = 48v l s = 800 h ns/np = 10 lp = 8.0 h i o = 200ma switching frequency, f sw = 200khz duty cycle, d = 28.6% r 6 = 499 solve for the current sense resistor, r cs , using equation 15. r cs = 295m determine the amount of voltage, ve, that must be added to the current feedback signal using equation 12. ve = 92.4mv using equation 17, solve for the summing resistor, r 9 , from ct to cs. r 9 = 2.67k determine the new value of r cs (r? cs ) using equation 18. r? cs = 350m additional slope compensation may be considered for design margin. the above discussion determines the minimum external ramp that is required. the buffer transistor used to create the external ramp from rtct should have a sufficiently high gain (>200) so as to minimize the required base current. whatever base curr ent is required reduces the charging current into rtct and will reduce the oscillator frequency. fault conditions a fault condition occurs if vref falls below 4.65v. when a fault is detected out is disabled. when vref exceeds 4.80v, the fault condition clears, and out is enabled. ground plane requirements careful layout is essential for satisfactory operation of the device. a good ground plane must be employed. a unique section of the ground plane must be designated for high di/dt currents associated with the output stage. v dd should be bypassed directly to gnd with good high frequency capacitors. references [1] ridley, r., ?a new continuous-time model for current mode control?, ieee tr ansactions on power electronics, vol. 6, no. 2, april 1991. isl8840a, isl8841a, isl8842a , isl8843a, isl8844a, isl8845a
14 fn6320.3 april 18, 2007 isl8840a, isl8841a, isl8842a , isl8843a, isl8844a, isl8845a small outline plast ic packages (soic) index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 c h 0.25(0.010) b m m notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include inte rlead flash or protrusions. inter- lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. controlling dimension: millimete r. converted inch dimensions are not necessarily exact. m8.15 (jedec ms-012-aa issue c) 8 lead narrow body small outline plastic package symbol inches millimeters notes min max min max a 0.0532 0.0688 1.35 1.75 - a1 0.0040 0.0098 0.10 0.25 - b 0.013 0.020 0.33 0.51 9 c 0.0075 0.0098 0.19 0.25 - d 0.1890 0.1968 4.80 5.00 3 e 0.1497 0.1574 3.80 4.00 4 e 0.050 bsc 1.27 bsc - h 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 l 0.016 0.050 0.40 1.27 6 n8 87 0 8 0 8 - rev. 1 6/05
15 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn6320.3 april 18, 2007 isl8840a, isl8841a, isl8842a , isl8843a, isl8844a, isl8845a mini small outline pl astic packages (msop) notes: 1. these package dimensions are wi thin allowable dimensions of jedec mo-187ba. 2. dimensioning and tolerancing per ansi y14.5m - 1994. 3. dimension ?d? does not include mold flash, protrusions or gate burrs and are measured at datum plane. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e1? does not includ e interlead flash or protrusions and are measured at datum plane. interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. formed leads shall be planar wi th respect to one another within 0.10mm (0.004) at seating plane. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dambar protrusion. allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of ?b? dimension at maximum ma terial condition. minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. datums and to be determined at datum plane . 11. controlling dimension: millimeter. converted inch dimen- sions are for reference only. l 0.25 (0.010) l1 r1 r 4x 4x gauge plane seating plane e e1 n 12 top view index area -c- -b- 0.20 (0.008) a b c seating plane 0.20 (0.008) c 0.10 (0.004) c -a- -h- side view b e d a a1 a2 -b- end view 0.20 (0.008) c d e 1 c l c a - h - -a - - b - - h - m8.118 (jedec mo-187aa) 8 lead mini small outline plastic package symbol inches millimeters notes min max min max a 0.037 0.043 0.94 1.10 - a1 0.002 0.006 0.05 0.15 - a2 0.030 0.037 0.75 0.95 - b 0.010 0.014 0.25 0.36 9 c 0.004 0.008 0.09 0.20 - d 0.116 0.120 2.95 3.05 3 e1 0.116 0.120 2.95 3.05 4 e 0.026 bsc 0.65 bsc - e 0.187 0.199 4.75 5.05 - l 0.016 0.028 0.40 0.70 6 l1 0.037 ref 0.95 ref - n8 87 r 0.003 - 0.07 - - r1 0.003 - 0.07 - - 0 5 o 15 o 5 o 15 o - 0 o 6 o 0 o 6 o - rev. 2 01/03

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